The guys over at hackshed have been busy. [Carl] is making programmable logic design easy with an 8 part CPLD tutorial. (March 2018: Link dead. Try the Wayback Machine.) Programmable logic devices are ...
Over on GitHub, [ttsiodras] wanted to learn VHDL. So he started with an algorithm to do Mandelbrot sets and moved it to an FPGA. Because of the speed, he was able to accomplish real-time zooming. You ...
WHO: Verific Design Automation, provider of SystemVerilog, VHDL and UPF parsers WHAT: Invites attendees of the 52nd Design Automation Conference (DAC) to stop by its booth (#2714) to pick up this year ...
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