This article presents a 1.75-GS/s single-channel 7-bit successive approximation register (SAR) analog-to-digital converter (ADC) that is based on loop-unrolled architecture with N-comparators for ...

A novel fully time-based two-step analog-to-digital converter (ADC) is proposed. Two time-based ADCs (TB ADCs) are used for coarse ADC (CADC) and fine ADC (FADC), resulting in low-power operation.