This CMOS two-input combination NAND/NOR gate is a three-input, fourpin logic gate. A p-channel enhancementtype MOSFET (Q1) and an n-channel enhancement-type MOSFET (Q4) form one complementary ...

The NAND gate is a circuit that outputs '0' when both inputs are '1', and '0' otherwise, so if you arrange the NAND gate as follows, the Invert circuit is completed.

The Cray-1 used only four different IC types, an ECL dual 5-4 NOR gate (one 5-input, and one 4-input, ... You just join both inputs of the NAND gate together. There’s your inverter.